Substrates used in semiconductor package circuits provide a microelectronic package with a mechanical base support and an electrical interface for external communication access to the devices housed within the package. An interposer is an intermediate layer often used for interconnection routing between packages or integrated circuits (“IC”s) as a ground/power plane. Sometimes the terms “substrate” and “interposer” are used to refer to the same thing. A three dimensional interposer, or “3D Interposer”, is an interconnection between multiple ICs and the circuit board, or substrate, on which the ICs are installed. When used in applications involving ICs, interposers can provide an ultra-wide bandwidth between 3D ICs by means of fine pitch through-silicon-vias (“TSV”s) and through-package-vias (“TPV”s). TSVs are vertical electrical connections passing completely through a silicon wafer or die whereas TPVs, or generally through vias, are vertical electrical connections passing between or passing completely through one or more packages.
TPVs are an important component in the creation of 3D packages and 3D ICs. TPVs provide the means for designers to replace the edge wiring when creating 3D packages (e.g. System in Package, Chip Stack Multi-chip Module). By using TPVs, designers of 3D packages or 3D ICs can reduce the size of the IC or package, e.g. wiring as well as the ability to double-side mount both types of active circuits, logic and memory. The use of TPVs can also help reduce the size of passives on the board. These benefits also provide a means to extend wafer level packaging to higher I/Os as an alternative to wafer level fan out technologies.
Some requirements for Interposers are 1) good dimensional stability at ultra fine pitch; 2) good coefficient of thermal expansion (“CTE”) match with substrate and die, 3) good thermal path from the IC to the board; and 4) enable integration of embedded passive components with high quality factors.